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Method for Forming Wiring Patterns and Vias on a Variety of Substrates

IP.com Disclosure Number: IPCOM000036834D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Amendola, A DeMarco, CH Klein, DL Leland, J Vance, TR [+details]

Abstract

This article describes a new method of defining wiring patterns and vias with pure metals or metallic alloys on various ceramic greensheets, pressed and fired ceramic substrates, or polymer surfaces. The disclosed procedure has a capability for obtaining higher resolution wiring patterns by lithography of finer dimensions than that obtainable through the use of conventional screening techniques.