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Implementation Verification Program Format Definition for Processor Verification Disclosure Number: IPCOM000036846D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29

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Moore, CR [+details]


A simulation environment has been developed for verification of complicated processor designs. The environment uses a cycle simulator with a user exit facility installed in the VM nucleus. A sophisticated simulation control program called RTX acts as an interface between all testcases and the actual simulation model. RTX has been developed to accept both Architecture Verification Programs (AVPs) and Implementation Verification Programs (IVPs). This article addresses the format of the IVPs and their interface to RTX which allows the required flexibility demanded by the IVPs while keeping the data management problem associated with large-scale system verification under control.