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This article describes a circuit arrangement which provides a mean combining the advantages of an industrial personal computer (PC) with the advantages of a secondary bus.
English (United States)
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This is the abbreviated version, containing approximately
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Pc-To-System-Bus Connection for Multiprocessing and Increased I/O
This article describes a circuit arrangement which provides a mean
combining the advantages of an industrial personal computer (PC) with the
advantages of a secondary bus.
The drawing shows the architecture of this disclosure. PC feature card A
controls and drives PC processor signals over cable B to and from secondary
driver card C. The PC card provides for decoding and generating signals to the
secondary bus which accesses the secondary I/O and memory areas. This
happens whenever a preprogrammed area in the host PC memory space is
accessed. There are circuits on the board which allow for wait states when
accessing secondary memory or when accessing secondary I/O. Since not all
PC control signals have equivalent secondary bus control signals, there is
circuitry to derive and sequence these new signals. Additional circuitry allows for
notifying software in the host PC when the secondary bus power supplies are on
and when the bus has been reset. Special registers allow the PC software to
access contiguous areas of secondary bus memory or to access sixteen different
blocks at a preprogrammed offset in each of sixteen segments of the one
megabyte secondary bus address space. This latter feature assists the host PC
in using secondary bus pro cessor cards in a multiprocessing environment such
that each card can be read and written without relocating the memory map. The
PC card also may be jumpered to use either eight or sixty-four kilobytes of the
first megabyte of PC memory, and has a control register t...