Unchecked Logic Analyzer
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29
The program described is a quick way to find the upper bound of the Error Detection (ED) coverage for a Thermal Conduction Module (TCM) by analyzing the logic connections on a TCM. If the upper bound of the error detection coverage is low, then more checkers are needed in the design. The use of this program reduces processing time needed to discover the unconnected (unchecked) logic by orders of magnitude over such a state of the art technique as simulation.