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In Situ Multilevel Resist Polysilicon Etch Process

IP.com Disclosure Number: IPCOM000036971D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Smith, KC [+details]

Abstract

By changing etch gas and electrical connections to elements internal to an etching tool, materials in a multilayer stack are etched at controlled relative rates and degree of anisotropy. The technique may be used to create features smaller than normal photo-limited size.