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Browse Prior Art Database

Automatic Detection/Implementation of Staggered Refresh

IP.com Disclosure Number: IPCOM000037204D
Original Publication Date: 1989-Nov-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Arroyo, RX Huerta, DA Zimmerman, JP [+details]

Abstract

Disclosed is a method which uses less system bus bandwidth for memory refresh by automatically detecting when a staggered refresh is required to minimize power supply current requirements. This method relates to a PS/2 computer containing sockets for Single In-line Memory Modules (SIMMs). Each SIMM may contain 1 megabyte, 2 megabytes, or 4 megabytes of dynamic RAM, which require periodic refresh cycles.