Method to Obtain Status Information on a Logic Model Under Simulation
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29
This technique of collecting simulation data allows accurate progress and current status reports to be obtained. The data is the result of software simulation on logic that is modeled exactly in software. This information is required to accurately project the quality of the logic and to plan resources and schedules required to achieve acceptable chip quality levels.