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Forming of Low Resistance Ohmic Contacts to III-V Semiconductors

IP.com Disclosure Number: IPCOM000037270D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Sadana, DK [+details]

Abstract

A technique is described whereby low resistance ohmic contacts are formed for III-V semiconductor devices. Described is the deposition of an elemental semiconductor over a III-V substrate, followed by ion implantation and annealing, to attain the low resistance ohmic contacts.