The InnovationQ application will be updated on Sunday, May 31st from 10am-noon ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

Self-Describing File Vintage for Hardware System Design Files

IP.com Disclosure Number: IPCOM000037343D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue


Related People

Stetler, WC [+details]


The current logic design process proceeds through multiple iterations before the design if finally released to manufacture. At any point in time multiple versions of a particular hardware component design file may exist. Each version has an associated level identity that indicates the particular level of design verification and function. Simulation, timing, and design verification models are constructed using the design files. In the past, control of the design levels was a manual process subject to error. The lack of automated level control allowed the use of inconsistent design levels for model build, resulting in problems solved but not included in the model being rediscovered when the model is run, and an unclear view of the remaining changes to be incorporated into subsequent models.