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Sidewall Angle Reduction of Silicon Oxide Features on Semiconductor Wafers

IP.com Disclosure Number: IPCOM000037568D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Gut, GM Weygand, JF Hlavka, JF [+details]

Abstract

The procedure described herein is performed to reduce the sidewall angle of silicon oxide-covered polysilicon lines on a semiconductor chip. The polysilicon lines are initially formed with a vertical sidewall. The oxide which is deposited on the sidewall is conformal. Therefore, the steep sidewall angle is retained. The sidewall may have other undesirable features in addition to its steepness.