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Browse Prior Art Database

Dynamic Memory Interface Synchronization

IP.com Disclosure Number: IPCOM000037638D
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-29

Publishing Venue

IBM

Related People

Authors:
Clark, SD [+details]

Abstract

In a Motorola 68000 based system, several devices may be attached to the Motorola 68000 bus. One of these devices is generally a memory controller which interfaces the Motorola 68000 bus to a memory array. Other devices on this bus may also have the ability to do accesses to this memory controller, some of which may run off system clocks which are asynchronous to the system clocks of the memory controller. Since memory is usually a valuable commodity in a microprocessor based system, reducing any added delay to memory accesses will directly increase the performance of the system. A method may be used to dynamically synchronize the control signals in such a way as to minimize the added delay to the memory access by only synchronizing those control signals originating from devices running with separate system clocks.