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Defective Bit/Word Line Elimination Method

IP.com Disclosure Number: IPCOM000038169D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue

IBM

Related People

Authors:
Adams, RD Towler, FJ [+details]

Abstract

To eliminate weak bit or word lines early in the testing and packaging process of memory chips, a device is constructed at the top and bottom of each line which causes a current flow through the line when activated.