Browse Prior Art Database

100% Available DRAM Disclosure Number: IPCOM000038355D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue


Related People

Penoyer, RF Vogl, NG [+details]


This article relates to memory applications where static random-access memory (SRAM) designs are chosen for their 100% availability (no need for refresh). Through the utilization of a unique dynamic random-access memory (DRAM) architecture, a lower cost solution is available. With DRAM cell densities at least 4X SRAM densities, a two-cell/ bit storage means, a small static buffer and some logic will result in a chip level cost and density advantage in favor of a 100% available DRAM architecture. The figure shows the 100% available DRAM architecture consisting of two independent memories A and B for storing two sets of identical data and a refresh cycle that alternates between the two memories.