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INVAR Mask for Finely Spaced C4/Blm Deposition

IP.com Disclosure Number: IPCOM000038420D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue

IBM

Related People

Authors:
Chance, DA Reiley, TC [+details]

Abstract

While it is desirable to decrease the dimensions and spacings of C4 pads on the Si wafer, it is difficult to locate fine holes, closely spaced (4 mils on 8 mils) in Mo having conventional 5-mil thickness. Thinner Mo is very difficult to manufacture and is likely to be too flexible to lie flat against a Si wafer. This latter difficulty would result in "halo-ing" of the evaporated solder during evaporation. A further deficiency in Mo as a mask material for Si is its relatively high coefficient of thermal expansion (4.9 x 10-6/ŒC) vs. Si (2.5 x 10-6/ŒC). Since alignment of the mask and the wafer occurs at room temperature and evaporation occurs at N 150ŒC, the Mo must have a compensated pattern and, furthermore, must be allowed to expand to match the underlying Si wafer.