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Pseudomorphic Heterostructure Three-Terminal Devices

IP.com Disclosure Number: IPCOM000038500D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue

IBM

Related People

Authors:
Jackson, TN Kleinsasser, AW Woodall, JM [+details]

Abstract

The use of lattice-matched epitaxial heterostructures in semiconductor devices is becoming widespread; however, the range of materials which can be used in such devices is restricted by the limited number of lattice-matched systems. Pseudomorphic heterostructures can be fabricated with barrier heights which are controlled by composition according to the electron affinity rule. (Image Omitted) The use of thin pseudomorphic layers in semiconductor heterostructure three-terminal devices greatly expands the range of materials systems available for such devices. Three examples of three-terminal semiconductor device structures are provided. They are: the hot electron transistor shown in Fig. 1, with band diagram in Fig. 2, the heterojunction bipolar transistor shown in Fig. 3, with band diagram in Fig.