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Browse Prior Art Database

Multiple Sidewall Process for Trench Masks

IP.com Disclosure Number: IPCOM000038529D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue

IBM

Related People

Authors:
Danner, DA Petrillo, EJ Polcari, MR [+details]

Abstract

This article relates generally to integrated circuit fabrication and, more particularly, to the formation of trenches having high aspect ratios. Deep, narrow trenches of sub-micron dimensions can be formed with standard optical lithography by first etching a wide trench and reconstructing walls to form narrow trenches. In Fig. 1, oxide layer 1 is either deposited or grown on substrate 2 to the thickness necessary to mask the trench etching. Layer 1 is masked and an area is etched with a fluorocarbon and hydrogen to leave wide trench 3 with a shallow oxide coating 4 at the bottom of the trench. In Fig. 2, silicon nitride spacers 5 are formed on the trench sidewalls, followed by deposition of silicon dioxide spacers 6 on spacers 5. The oxide surface is again oxidized for protection. In the next step seen in Fig.