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Address Multiplexing to Support Different Size Dynamic RAM Modules

IP.com Disclosure Number: IPCOM000038558D
Original Publication Date: 1987-Feb-01
Included in the Prior Art Database: 2005-Jan-31

Publishing Venue

IBM

Related People

Authors:
Corkell, AF East, RE Parks, TJ [+details]

Abstract

This article describes a technique of multiplexing address lines into dynamic random-access memory (RAM) chips to support different-size modules. Dynamic RAM chips generally are made in families. All members of a particular family have compatible timings and pin outs. The only difference between members of a family is the number of bits of storage that the chip has and consequently the number of address lines required to address all those bits. Currently dynamic RAM chips come in families with three different sizes of chips. These chips are 16K x 1, 64K x 1, and 256K x 1 which take 14, 16, and 18 bits of address, respectively, to access all the data in the RAM chip.