Browse Prior Art Database

High-Performance Microcode Command Architecture

IP.com Disclosure Number: IPCOM000038930D
Original Publication Date: 1987-Mar-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Freeman, WA Solie, DW [+details]

Abstract

A method is described to maximize the efficiency of the process of issuing commands to a processor. The design of an attachment adapter that contains a processor presents a number of design trade-offs concerning the ease of interfacing and adapter performance. This invention provides a means by which the majority of the adapter commands can be initiated as a result of a single I/O write operation. This technique removes the requirement that the system processor and the adapter processor be synchronized during the command initiation process. The addition of a processor to a device attachment adapter permits this adapter to provide an extremely flexible solution to a variety of device attachment problems.