Browse Prior Art Database

Three-Dimensional Silicon Packaging

IP.com Disclosure Number: IPCOM000039119D
Original Publication Date: 1987-Apr-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Blum, A Boertzel, M Briska, M Najmann, K [+details]

Abstract

System or computer (CPU) layout often calls for very fast and short connections between closely intercommunicating logic regions on, say, two different chips, while other intercommunications, for example, between several chips (standard busses), are not so time-critical. A removable and flexible interconnection structure is proposed that permits chips with critical intercommunication to be positioned overlying each other, leading to three-dimensional modular packaging. The structure of the proposed interconnection is schematically illustrated in the figure, reference numerals 1 and 2 denoting the components to be electrically connected, which may be VLSI chips and/or modules.