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T1 Circuit Monitor Disclosure Number: IPCOM000039328D
Original Publication Date: 1987-May-01
Included in the Prior Art Database: 2005-Feb-01

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Cedarholm, JP [+details]


This invention provides a television monitor display of the bit stream of a framed T1 (1.544-megabit-per-second) communication circuit. The bits of an entire superframe of the T1 signal appear as dashes on the monitor screen (Fig. 1). The corresponding bit positions of each frame are aligned vertically in the superframe display block. Successive superframes are superimposed, so that signalling and framing bits which do not change from superframe to superframe are fixed in the display, while data bit positions scintillate. The device consists of simple logic circuitry driving a standard (Image Omitted) television monitor. The television and T1 characteristics are matched to produce a visual display of the T1 frames.