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Adaptive Synchronous Data Transfer Logic

IP.com Disclosure Number: IPCOM000039385D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Frazier, GR [+details]

Abstract

An arrangement is described which allows synchronous data transfer without complex logic circuitry. "Synchronous" data transfers allow data to be transferred at high speeds over long cables by eliminating the handshake delays caused by propagation times. In a typical data transfer over a cable, "request" (REQ) pulses are sent by a controller at one end of a cable, and "acknowledge" (ACK) pulses are sent by the controller at the other end of a cable in order to synchronize data bytes flowing over the cable. The REQ-ACK signal interchange is sometimes referred to as a "handshake." In synchronous data transfers, multiple REQ pulses can be sent by one controller before it receives any ACK pulses from the other controller.