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Digital Phase Comparator for Phase-Locked Loop Particularly for Varying a Computer Clock Frequency in Small Steps for Testing During Manufacturing Disclosure Number: IPCOM000039390D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue


Related People

Griess, KR [+details]


A phase-locked loop circuit comprises a variable oscillator, a source of a reference frequency, frequency dividers that receive the reference frequency and the oscillator frequency and produce a reference sub- frequency and an oscillator sub-frequency, and a digital circuit that compares the phase of the two sub-frequencies and produces an analog signal to control the oscillator phase. In one application for the circuit, the oscillator forms a variable clock for testing a computer and the reference frequency is varied in discrete steps during a test. A digital value that controls the oscillator frequency is stored in an up-down counter, and the count in the counter is applied to a digital-to-analog converter that produces a signal to vary the oscillator frequency.