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Power Reduction Scheme With Data-Dependent Write

IP.com Disclosure Number: IPCOM000039495D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Loehlein, WD Tong, MH [+details]

Abstract

The CV2 power in an array can be reduced by turning off word line WL at an early stage and by writing only into those cells storing opposite data. This means that bit lines BL, whose cells store opposite data, are discharged from data-in (data-dependent write). The CV2 power is the power dissipation occurring during the precharging and discharging of a capacitor, where V is the precharge voltage and C the capacitance. Thus, most of the CV2 power originates from precharging and discharging the bit lines. One bit line for each cell in a row is discharged when a word line is selected. The bit lines are also discharged by input drivers during writing. To reduce the CV2power, discharging of the bit lines is minimized. Any array having a wide data-out bus and a late data gate DG feature is subject to a high CV2 power.