Advanced I/O Adapter Design
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
I/O adapters presently disclosed allow for more efficient usage of multi-accessible system buses of the type contained in contemporary IBM Personal Computer systems. Referring to the illustration, system bus 1 couples CPU 2 and memory 3 with I/O adapters 4. Each adapter links one or more respective devices 5 to the bus, and contains logic 6 for selectively compressing and decompressing data signals in transit between the bus and respective devices. The effect is to reduce the volume of data traffic on the bus relative to what it would have been without compression. Upon initiation of system access to a device (or communication attachment), the respective adapter is conditioned to operate in one of three modes: compress mode, decompress mode, or clear mode. In compress mode, the adapter operates to compress data, e.g.