Programmable Address Comparator
Original Publication Date: 1987-Aug-01
Included in the Prior Art Database: 2005-Feb-01
An address comparator is described in which the size and location of the range to be recognized are programmable by external inputs. (Image Omitted) On any microprocessor bus, various devices attached to that bus must recognize certain addresses. In many systems, this address comparison is fixed in hardware. However, in some cases it is desirable to have this compare function programmable. This arrangement provides a variable compare function which can recognize a range of addresses whose size and location can both be altered. Fig. 1 illustrates the comparator, which consists of a number of single-bit comparators. These single-bit comparators compare incoming address against reference bits. Each of these is also fed with a signal which will force a true output, thus effectively disabling that particular compare.