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Logic Card Test Method Disclosure Number: IPCOM000039814D
Original Publication Date: 1987-Aug-01
Included in the Prior Art Database: 2005-Feb-01

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Related People

Ishii, T Nakamura, T Niimi, S [+details]


This method relates to testing a logic card including a microprocessor. This method enables the detection of bugs in an unknown logic card easily and in a short time by using clock cycles of the microprocessor in comparing the operation of the logic card under test with that of a logic card which operates correctly. With reference to the figure, each of the pins of a logic card 2 which is to be tested is connected to one input of a corresponding exclusive-OR gate 6, and each of the pins of a logic card 4 which operates correctly is connected to the other input of the corresponding exclusive-OR gate 6. The number of exclusive-OR gates 6 is the same as the number of pins of the logic card 2 or 4.