Browse Prior Art Database

Two-Buffer System With Sequential Full Image Transfer

IP.com Disclosure Number: IPCOM000039878D
Original Publication Date: 1987-Aug-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Evangelisti, CJ Lumelsky, L [+details]

Abstract

A two-buffer system for providing images on a raster display without resulting artifacts is disclosed and comprises first and second frame buffers having dual-port random-access memories (RAMs) with each buffer alternately refreshing the display and being updated by the other frame buffer via feedback, and logic circuitry for controlling the refreshing and updating cycles of the first and second frame buffers. The provided system allows fast sequential transfer of the full image from one buffer to the other without the intervention of a microprocessor, as is required in the systems known in the art. Turning to the figure, the two-buffer system 10 for providing images on a display is seen to comprise frame buffers 15 and 20, flip- flops 25 and 30, exclusive OR gate (XOR) 35, AND gates 42, 44, 46 and 48, and OR gate 50.