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Divider Line for Display

IP.com Disclosure Number: IPCOM000040091D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01

Publishing Venue

IBM

Related People

Authors:
Nojima, K Saitoh, M Seki, Y [+details]

Abstract

This article describes a circuit for displaying one or more horizontal divider lines to divide a display screen into multiple areas. The circuitry shown in Fig. 1 is operable to define a special row consisting of three scan lines, wherein the middle scan line is brightened as the divider line. For example, row N is defined as the special row, while rows N-1 and N+1 are normal lines, as shown in Fig. 2. In Fig. 1, a line attribute register is loadable with a line attribute for each row. The line attribute for the row to show the divider line includes a particular bit to enable a line decoder. The enabled line decoder operates to decode a line count output form a line counter which is incremented in synchronism with the scan lines.