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Content-Addressable Memory Multiple-Hit Checker CIRCUIT Disclosure Number: IPCOM000040125D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01

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Smith, CD [+details]


This described circuit/system implements a multiple-hit checker. The checker circuit consists of an improved buffer circuit, a dot sum and a checker compare circuit. The checker compare circuit consists of a clamp, a single-match compare circuit, a double-match compare circuit, and a reference circuit. In Fig. 1, K00 is the match not input. Q10 is the match output. Q20 sinks one unit of current when there is a match. Z02 is a voltage reference input. Y00 is a current source reference input. K00 has a voltage swing around the Z02 reference. V00 is a supply at 0.0 volts. V03 is a supply greater than 3.4 volts. In Fig. 2, K00 is the 'SUM' input. Q10 is greater than or equal to one hit or match output. Q11 is the complement of the Q10 output. Q12 is greater than or equal to an output of two hits or matches.