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Efficient Paging to Provide Large Memory in a Small Address Space

IP.com Disclosure Number: IPCOM000040254D
Original Publication Date: 1987-Oct-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Rickard, DA [+details]

Abstract

A technique is described whereby a read-only memory (ROM) addressing range, used in computer systems, is expanded from a single eight kilobytes of memory space to four eight kilobyte pages without replicating control code and data mapping information associated with such memory. Referring to the figure, a byte-wide memory is assumed. A page select register 10 determines which of the four pages will be active. An address comparator 12 selects a code/table memory 14 and disables decoder 16 whenever a memory address is below the address of the first data location in a plurality of data memories 18, 20, 22 and 24.