Browse Prior Art Database

Wafer Chuck

IP.com Disclosure Number: IPCOM000040377D
Original Publication Date: 1987-Nov-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Brown, RE Hoffman, JE Mendel, E Rottman, HR [+details]

Abstract

Semiconductor wafers are rigidly vacuum clamped during photoresist exposure operations to minimize registration errors. While accomplishing this task, conventional wafer chucks cause undesired, non-linear, random variations of chucked wafer flatness (due to friction effects between the wafer and chuck surface during the clamping cycle). In turn, these cause lateral distortions of the wafer surface and (after exposure) of the etched pattern arrays. This wafer chuck overcomes these problems, substantially reducing overlay errors pertaining to wafer-chucking tolerances. The drawing shows the basic design appearing "on the surface" of this wafer chuck. Several features of the improved chuck design minimize registration errors as follows: (1) The ratio between groove (i.e.