Browse Prior Art Database

Error-Reporting Registers

IP.com Disclosure Number: IPCOM000040391D
Original Publication Date: 1987-Nov-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Gayhart, BJ Giraldi, J Krygowski, MA [+details]

Abstract

Error-reporting registers provide a mechanism for first error capture in an environment where propagated errors and time-out checkers can result in a multiple error recording due to one fault. There are error-reporting registers for each field-replaceable unit (FRU). The error-reporting registers (ERRs) contain the error checkers for that element and take a single-cycle picture of these checkers which is latched up in the ERRs until they are read out and reset by the logic support station (LSS). This level is considered the lowest ERR level. The ERR contents in each TCM are ORed together into one output and sent to the next hierarchic error-reporting register on each board. This ERR covers error checkers from FRUs comprising the next level replace package.