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Structured CMOS Physical Design Disclosure Number: IPCOM000040441D
Original Publication Date: 1987-Nov-01
Included in the Prior Art Database: 2005-Feb-02

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Cases, M Klambatsen, P Levi, R Stoops, C [+details]


A technique is described whereby CMOS technology is used to create a unique cell design which is constructed from a model cell called a template. The template then becomes the basis for all circuit books used throughout the chip design. The template enhances the creation of (Image Omitted) circuits due to its "built-in" structure, since it is topologically programmable by virtue of its ability to be personalized with contacts and wires without changing the base template. The template described herein is unique in that it is designed to allow the height dimension to be varied in multiples of grid increments. The required number of grid increments is determined by the number of wiring channels needed to connect the basic template, and/or the minimum area necessary to fit the required devices to the template.