Browse Prior Art Database

Diagnostic Program Control for ECC Logic

IP.com Disclosure Number: IPCOM000040563D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Arlington, DL Hansen, RC Herndon, SB Rogers, JF [+details]

Abstract

An added Special Function Register in a processor storage card enables testing of logic data flow paths without dependency on the functionality of storage array chips through ordinary machine instructions by the use of a wrap path for data. Testing occurs prior to operation of error correction codes or remapping at the storage array chips. A Special Function Register in the processor storage card consists of four bits in each of two data flow chips, and places data flow logic in a special diagnostic mode to facilitate testing. In the figure, the normal data flow for a store (write) operation is from system storage bus 1, receivers 2, input latches 3, data flow logic 4, output latches 5, drivers 6, bus 7 and storage array 8.