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Detection of Multiplexer Structures in Logic Disclosure Number: IPCOM000040576D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

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Perlowitz, WB [+details]


When logic is synthesized from a high level language, the efficiency of the eventual implementation is often dependent on the effective use of space efficient "intermediately sized" structures. Boolean minimization of small structures (e.g., NORs) has been an area of active research for more than two decades, and the use of large structures (e.g., multipliers) is generally known by the architect before synthesis begins. Successful detection of intermediately sized structures in the synthesis process may then determine the acceptability of the synthesized design. Architect specification of these structures is unacceptable since it will mask novel implementations of the target function.