Browse Prior Art Database

DUAL DATA TRANSFER RATE INTEGRATED DISKETTE CONTROLLER WITH FREQUENCY MULTIPLIER DATA RECOVERY CIRCUIT

IP.com Disclosure Number: IPCOM000040593D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Buhler, O Pacheco, J Rodriguez, S [+details]

Abstract

A technique is described whereby a dual data transfer rate integrated diskette controller with frequency multiplier data recovery is implemented into personal computer diskette drive circuitry to increase the functions of data transfers and to be compatible with existing software programs. The dual rate transfer controller consists of a gate array module that provides the support to a primary diskette controller and to an external analog phase lock-loop for data recovery. The gate array consists of three sections: diskette registers, write logic, and read logic. Diskette Register Section: The gate array has five registers used for configuration drive selection and diagnostics. A digital input register is used to sense the status of the diskette change line and for diagnostic purposes.