New Up-Level Clamp for Push-Pull Off-Chip Drivers
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02
The described circuit eliminates parasitic DC loading of its data bus when its drivers are in tri-state. The circuit works in the following manner. A steady-state output level at node X, when IN1 and IN2 inputs are low, is determined by voltage at node 1 minus base-emitter drops of transistors T3 and T4. Node 1 voltage is set by R1, R3, D2, T2 and by diodes D5, D6, which are shared between drivers to conserve layout space. R3 is sized so that diode D3 conducts only when node X overshoots its steady-state level. D3 has T2 function to isolate node X from pre-drive and clamp circuits when voltage at node X or at node 1 is low. The advantage of this is that when the tri-state input transistor T6 is turned on, no DC current can flow from or into node X regardless of voltage levels on Data bus.