Browse Prior Art Database

Cross Connected Busses in a Dual Microprocessor Environment

IP.com Disclosure Number: IPCOM000040622D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Ellis, CW Rohulich, AS Surgent, JG [+details]

Abstract

Shown in Fig. 1 are dual microprocessors controlling various power components of a mainframe computer. Each microprocessor has an 8-bit parallel bus connecting it to the host support computer. Each microprocessor communicates with the host only those details concerning the specific components over which it has control. Should either bus path or host port experience failure, no communication is possible between the host and the microprocessor on the failing bus. This limitation is overcome in a configuration which provides cross-connecting feed busses. The dual processor controlled input/output device allows parallel paths to each microprocessor for redundant operation as described in the following. Fig.