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Metal Lift-Off Process Extension to Submicron Dimensions

IP.com Disclosure Number: IPCOM000040653D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Bergendahl, AS Hakey, C Holmes, SJ Maltabes, JG [+details]

Abstract

Manipulation and control of deep ultraviolet (DUV) photoresist bake time and temperature provides a suitable process window and image for metal lift-off applications in the submicron range. The lift-off of evaporated metal patterns from integrated circuits has been an important aspect of semiconductor chip fabrication for many manufacturers. The ability to manipulate and control the resist image profiles are critical factors in a submicron metal lift-off process. An overview of this process is shown in the figure. A resist image with negative slopes is formed on a wafer followed by a blanket deposit of metal. After metal deposition, resist is rinsed off the wafer, and metal is removed from selected areas leaving a defined circuit pattern on the wafer.