Method to Provide a Selectable ADDRESS RANGE for Display Adapter Card
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02
The figure is a functional block diagram of an addressing circuit for an adapter card in which the address space required for the display to reside in is 256K bytes. Two different beginning address spaces had to be assigned to the display so that it could function in two different Personal Computer (PC) systems. With one system the display memory area is located in the crowded address space below 1 Megabyte at 0C0000 Hex address. In the second system the display memory area is located above 1 Megabyte at C00000 Hex address. All the memory space address decoding for the display is done in Programmable Array Logic (PAL). Functionally, the PAL creates two address decodes by using System Address lines 23 thru 17 (+SA23...+SA17). Another input to the PAL is + SELECT ADDRESS RANGE.