CMOS On-Chip VDD Lock-Out Pulse
Original Publication Date: 1987-May-01
Included in the Prior Art Database: 2005-Feb-02
A circuit is disclosed that generates an on-chip signal at the application of the supply voltage, and at the same time prevents the pulse signal from recurring once the operation has been established. Fig. 1 is a circuit schematic, having letters identifying various nodes. Fig. 2 is a diagram of voltage waveforms, identified by letters corresponding to the nodes in Fig. 1 where the waveforms are taken.