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Speedup Analyzer for Parallel Computer Programs Disclosure Number: IPCOM000041248D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02

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Bolmarcich, AS Chang, WL Darma-Rogers, F Norton, VA So, K [+details]


A technique is described whereby an analyzer provides a speedup process for the evaluation of algorithmic performance of parallel programs, as used in multi-processor (MP) computer systems. The analyzer determines the degree of parallelism, if bottlenecks are present in the processing of programs, and the optimum number of processors to run the programs. With the use of the analyzer, the programmer may tune the programs' performance and MP overhead without detailed tracing or simulation.