Browse Prior Art Database

CMOS Exclusive or Circuit

IP.com Disclosure Number: IPCOM000041467D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Craig, WJ [+details]

Abstract

An exclusive OR circuit is implemented in complementary metal-oxide-semiconductor (CMOS) technology which uses N channel transfer gates or transistors and which requires only six devices, three P channel devices P1, P2 and P3 and three N channel devices N1, N2 and N3, with the use of a very small amount of direct current power. As seen in the figure, if only A or B is high, i.e., a 1, node N is low and, therefore, the output is high. If both A and B are low, the voltage VH from the supply terminal is applied to node N, turning off P3 and turning on N3, dropping the output to ground. If both A and B are high, the voltage at node N reaches VH minus the threshold voltage (VT) of N1 or N2. This voltage VH-VT will turn on N3 but it may not be high enough to completely turn off P3.