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Planar Process for Polybase Technology

IP.com Disclosure Number: IPCOM000041673D
Original Publication Date: 1984-Feb-01
Included in the Prior Art Database: 2005-Feb-02

Publishing Venue

IBM

Related People

Authors:
Bhatia, HS Valsamakis, EA [+details]

Abstract

There is non-planarity at the collector and Schottky barrier diode (SBD) contacts in certain bipolar structures. The non-planarity is a 100- to 800-nanometer step to be covered with metal. This step can result in metal discontinuity. A slight misalignment of metal can result in hillocks. This problem can be eliminated with the following process: 1. The process begins after the formation of deep trench silicon dioxide isolation 10 and recessed oxide isolation 12 in a silicon body which includes P-substrate 14, N+ subcollector 16 and N-epitaxial layer 18. Regions of the silicon body are designated to contain vertical NPN, devices, SBDs, resistors and lateral PNP devices, as indicated in Fig. 1. 2. A 300-nanometer layer 20 of SiO2 is grown over the body's surface to produce the Fig. 1 structure. 3.