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Ion Implantation Process for a Low Barrier Schottky Barrier Diode Products

IP.com Disclosure Number: IPCOM000041824D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Gartner, HM Nagarajan, A Sharif, A Sorbello, F [+details]

Abstract

Reliability of bipolar semiconductor devices used in conjunction with low barrier and high barrier Schottky barrier diodes can be increased by the use of the following process. The conventional bipolar process is utilized to form the Fig. 1 structure which includes N+ subcollector region 10 and N- epitaxial layer 12. Regions of the monocrystalline silicon in the N- epitaxial region 12 are isolated from one another by silicon dioxide recessed oxide regions 14 and recessed oxide isolation regions 16. Region 16 isolates the emitter base region of the bipolar device from its collector region. The silicon dioxide layer 17 is formed over the surface of the structure and is followed by the formation of a silicon nitride layer over the silicon dioxide layer 17. A resist layer 20 is formed thereover.