Browse Prior Art Database

PROCESS FOR FORMING A SELF-ALIGNED SiO2 MOAT

IP.com Disclosure Number: IPCOM000041895D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Pan, PH [+details]

Abstract

A process is provided for forming doped regions which are self-aligned to isolation dielectric moats. Existing processes using SiO2 moat isolation techniques provide for the formation of a thick SiO2 layer over a silicon substrate and the removal, through etching, of the SiO2 layer from the areas selected for the formation of the active device regions. Such processes require an additional masking step to establish the ion-implanted regions under the thick SiO2 moats. The process described in the following processing sequence and explained with reference to Figs. 1-5 overcomes this prior-art problem. A layer of a filler material 12, such as Si3N4, is formed on a substrate 10.