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Recessed Oxide Isolation Structure and Process

IP.com Disclosure Number: IPCOM000041900D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Lajza, JJ Trumpp, H [+details]

Abstract

An improved semiconductor structure is provided which may be used for recessed oxide isolation by a process which includes planarization and/or framing techniques. The structure is first formed by growing a thin layer of silicon dioxide 10 on a semiconductor substrate 12, such as silicon, which may be of an N type conductivity. A thin layer of silicon nitride 14 is deposited onto silicon dioxide layer 10 followed by a first layer of photoresist 16. A thin layer of plasma nitride 18 is formed on the first layer of photoresist followed by a second layer of photoresist 20. An opening 22 is formed in the second photoresist layer 20 by any known technique.