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Browse Prior Art Database

Silicide Stiffened SFET Source/Drains

IP.com Disclosure Number: IPCOM000041907D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Roberts, S White, FR [+details]

Abstract

This article describes a process for forming self-aligned silicide field-effect transistor (SFET) structures which are compatible with the use of gate structures including a silicon dioxide - silicon nitride combination. A metal-rich silicide may be used to reduce the junction silicon consumption during oxidation and formation of the self-aligned silicides. It includes the following steps: a. Forming a silicon dioxide layer on a silicon substrate. b.