Lithographic Measurement Aid for VLSI Technology
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
As device technology for VLSI (very large-scale integration) application approaches the one-micron region, in-line measurement for process and device parameter control of dimensions becomes increasingly important. A visual pattern test structure is disclosed which allows the rapid determination of over-etching or, alternately, of the excessive deposition of vacuum-evaporated structures during semiconductor manufacture. In Fig. 1, the pattern 1 and the pattern 5 form a measurement device for determining when an excessive deposition of vacuum-evaporated metal, for example, has taken place. The patterns 1 and 5 can be formed by correspondingly shaped apertures in the vacuum-evaporation mask. The pattern 1 has the projections 2, 3 and 4 which are spaced equidistantly along the pattern.