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New Sidewall-Spacer Technology to Achieve LDD MOSFET Structure

IP.com Disclosure Number: IPCOM000042028D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03

Publishing Venue

IBM

Related People

Authors:
Hsu, Y [+details]

Abstract

A process is described for forming a sidewall-spacer regardless whether the gate sidewall is vertical or sloped. The process can be used to achieve LDD MOSFET structure and reduce the existing process steps. Oxide sidewall-spacer has been used to fabricate LDD MOSFET structures [*]. To successfully use that technique, a vertical gate sidewall is very essential prior to the deposition of second CVD (chemical vapor deposited) oxide in order to form an oxide spacer using RIE (reactive ion etch). This may impose a restriction in the process control because of the difficulty of achieving vertical sidewall. It is particularly true when a polycide composite gate is used due to the different etching characteristics of silicide and polysilicon.